14:00
Chair - Enrico Sangiorgi, University of Bologna/ SiNANO Institute
Enrico Sangiorgi is professor of Electronics the University of Bologna and Director Emeritus of the Sinano Institute.
He is a member of the Aeneas Supervisory Board. He is a member of the Supervisory Board of the Foundation Chips-IT, a recently established national research center.
He has been Vice Rector at the University of Bologna and a Visiting Scientist at Stanford University and Bell Laboratories.
His research covers the physics, characterization, modeling, and fabrication of solid-state devices and integrated circuits. He has been working on device scaling and reliability.
Enrico Sangiorgi is Distinguished Lecturer and Fellow of the IEEE (2005).
14:15
The European Chips Act is an ambitious plan to strengthen the semiconductor ecosystem and achieve 20% production share in the EU. While funding is essential, the largest challenge facing the industry might be how to recruit the required workforce. After having recalled results of the METIS project, which identified trends, challenges and opportunities associated with the skills needs in the European microelectronics industry, the talk will present the European Chips Skills Academy Project (ECSA), which will provide skills anticipation backed by hard data. ECSA aspires to open and explore new opportunities for collaboration between educational institutions and industrial leaders.
Patrick Cogez, Technical Director of AENEAS
After starting his career in the French Ministry of Industry, Dr. Patrick Cogez joined STMicroelectronics in 1988, where he designed and implemented the Information Systems of the Crolles R&D and Manufacturing site, and was later appointed Director for Innovation and External Research for the Technology R&D of the Embedded Solutions Sector of STMicroelectronics. He is currently Technical Director of AENEAS, a not-for-profit Industrial Association representing its members in the ECS value chain and aiming at fostering Research and Innovation and creating an effective funding landscape. He is the current Chair of the ECS Strategic Research and Innovation Agenda, and involved in several European collaborative projects on international cooperation and skills development for the microelectronics industry.
Patrick graduated from Ecole Polytechnique and Ecole des Ponts et Chaussées in France, and holds a M.Sc. degree in Operations Research and a PhD in Industrial Engineering, both from the University of California at Berkeley. He completed an Executive MBA programme at NEOMA Business School, Paris. He co-managed three PhD theses and co-authored several articles on the management of breakthrough innovation.
Léo Saint-Martin, Partner at DECISION Etudes & Conseil
Léo Saint-Martin is partner at DECISION Etudes & Conseil. Léo joined DECISION in 2016 to manage a team of economists and bring his expertise in market research and economic analysis in the fields of electronics components and systems.
Léo is the project manager of the economic analysis of the semiconductor industry within the ICOS project (International Cooperation On Semiconductors) since 2023 on behalf of DECISION.
Léo is also the project manager of the ECSA project (Microelectronics Training, Industry and Skills) and of the European Chips Skills Academy project since 2019 on behalf of DECISION. DECISION is in charge of the skills monitoring and of the quantification of the European talent gap within these projects which will run until 2027.
Léo has also been the manager and the main redactor of studies made by DECISION for the European Commission, French government bodies, industry associations and industrials on topics related to the semiconductor value-chain, the electronics value-chain and end-user industries (automotive, defense & security, industrial & robotics, cloud computing…).
Before joining DECISION Etudes & Conseil, Léo has conducted a number of theoretical and empirical research projects in economics and statistics focusing on local and international development issues.
Léo holds a master’s degree in economics from Paris-Dauphine University, a bachelor’s degree in economics and law from Paris Ouest Nanterre-La Défense University and an advanced certificate in corporate finance from HEC Paris.
14:45
The purpose of this session is to present the early findings and insights from the Thematic Working Group (TWG) on Skills, a collaborative effort led by ALLPROS.eu. The group is composed of EU funded projects, stakeholders from industry sector, research and governments with the aim to address the skills shortages within the semiconductor industry.The TWG is working on a practical Blueprint to identify key challenges, gaps, and opportunities in the semiconductor workforce landscape through an open consultation process among various stakeholders from industry, academia, and policy sectors. The session will provide an overview of the progress made thus far and engage participants in discussions surrounding the preliminary findings.
Leonardo Freitas, ALLPROS.EU
Leonardo Freitas leads IDC’s European IT Talent for AI, Cybersecurity, Cloud and Digital Business Success research, focusing on IT talent, skills development, skills mapping, and identification of key competences in core areas of technology. He has a background in research and consulting, with 10+ years’ experience in ICT, public sector transformation, and FMCG. He has developed his career by working on roles related to brand and product strategy, consumption behaviour, and public sector/policy research for ICT-related projects at companies such as GlobalData, Kantar, Euromonitor, and Nielsen.
15:15
Paolo A. Gargini, IEEE - IRDS
Paolo A. Gargini
(IEEE Life-Fellow, JSAP Fellow and Chairman IRDS. Former Director of Technology Strategy at Intel))
In the 70s Dr. Gargini was a researcher at Stanford University and at Fairchild Camera and Instrument. In 1980 as manager of MPU technology at Intel transferred into manufacturing the iconic 80286 and 80386. In 1996, he became Director of Technology Strategy and responsible for worldwide consortia research until 2012. He was a member of Sematech, SRC, EUV LLC, EIDEC, ASET, IMEC and SIA Boards, and Chairman of the I300I and NRI. From 1998 to 2015, Dr. Gargini was Chairman of the ITRS sponsored by the WSC. Since 2016 he is the Chairman of the IRDS sponsored by IEEE.
15:45
To mitigate skill shortage, the talk proposes the training concept of µe-Bauhaus, which transfers Bauhaus philosophy that joins arts and crafts to training in semiconductor manufacturing. By adapting the Bauhaus workshop concept, a theoretically sound and at the same time highly practice-oriented education is created. The presentation provides an inside into the current state of its implementation at FAU Erlangen-Nuremberg and Fraunhofer IISB.
Sabrina Anger, Fraunhofer
– Diploma in applied natural science and a PhD in physics received from the Technical University Bergakademie Freiberg, Germany.
– Joined Fraunhofer IISB in 2012; since then, participation in a number of German and European research projects (iDev40, AIMS5.0, QNC)
– Nowadays working as quality assurance and project manager in P-Fab-management group in the scientific area “Semiconductor Production Technology” at Fraunhofer IISB
16:15
Georgios Fagas, Director of the SiNANO Institute
Giorgos Fagas PhD MBA is Head of CMOS++ and EU Programmes at Tyndall, and member of Tyndall’s Leadership Team. CMOS++ is a strategic programme addressing emerging materials, devices and architectures for next-generation information processing interfacing with CMOS and beyond. He is contributor to key international strategic R&I agendas incl. the ECS-SRIA and IRDS and has initiated several large-scale EU projects. He currently leads the EU-funded programmes for open access to infrastructure for early-stage research on nanoelectronics and semiconductor chips, respectively, ASCENT+ and INFRACHIP, and the ICOS project activity on Technology Scanning and Foresight. Giorgos holds prominent positions in various policy and industry groups including Director of the SiNANO Institute.16:45 – Coffee Break
17:15
Léo will present the current positioning of the European Union industrial ecosystem across the global semiconductor value-chain, especially in comparison with the USA, China, Japan, South Korea, Taiwan, and Singapore.
This presentation will describe through economic figures the strengths, weaknesses and strategic dependencies of these different countries and region across the semiconductor value-chain.
Léo Saint-Martin, Partner at DECISION Etudes & Conseil
Léo Saint-Martin is partner at DECISION Etudes & Conseil. Léo joined DECISION in 2016 to manage a team of economists and bring his expertise in market research and economic analysis in the fields of electronics components and systems.Léo is the project manager of the economic analysis of the semiconductor industry within the ICOS project (International Cooperation On Semiconductors) since 2023 on behalf of DECISION.
Léo is also the project manager of the ECSA project (Microelectronics Training, Industry and Skills) and of the European Chips Skills Academy project since 2019 on behalf of DECISION. DECISION is in charge of the skills monitoring and of the quantification of the European talent gap within these projects which will run until 2027.
Léo has also been the manager and the main redactor of studies made by DECISION for the European Commission, French government bodies, industry associations and industrials on topics related to the semiconductor value-chain, the electronics value-chain and end-user industries (automotive, defense & security, industrial & robotics, cloud computing…).
Before joining DECISION Etudes & Conseil, Léo has conducted a number of theoretical and empirical research projects in economics and statistics focusing on local and international development issues.
Léo holds a master’s degree in economics from Paris-Dauphine University, a bachelor’s degree in economics and law from Paris Ouest Nanterre-La Défense University and an advanced certificate in corporate finance from HEC Paris.
18:45 – End of Day 1 – Networking Cocktail
Chair - Julia Kaltschew, VDI/VDE IT
8:45
The main objectives of the Horizon Europe ICOS project, dedicated to International Cooperation On Semiconductors, will be presented. ICOS is devoted to: an exhaustive analysis of the value chains of semiconductors for electronics and photonics, and the thorough examination of the strengths and gaps of European and International industries in this area ; A Technology Scanning & Foresight study, focusing on the next generation and emerging technology segments, particularly in advanced computation and functionalities : The determination of the most promising technologies that offer the best potential for fruitful research collaboration in the future with leading semiconductor countries. A recent survey aimed at collecting stakeholder feedback on EU International cooperation on semiconductors will also be summarized.
Francis BALESTRA, ICOS coordinator
Francis Balestra, CNRS Research Director at CROMA, is Director Emeritus of the European SINANO Institute and President of IEEE Electron Device Society France, and has been Director of several Research labs. He coordinated several European Projects (NEREID, NANOFUNCTION, NANOSIL, etc.) that have represented unprecedented collaborations in Europe in the field of Nanoelectronics, and is currently coordinator of the Horizon Europe ICOS project dedicated to International Cooperation on Semiconductors with leading semiconductor countries. He founded and organized many international Conferences, and has co-authored more than 500 publications. He is member of several European Scientific Councils, of the Advisory Committees of International Journals and of the IRDS (International Roadmap for Devices and Systems) International Roadmap Committee, as representative of Europe.
9:15
This presentation outlines key technological advancements in advanced functionalities. After an overview of current trends and challenges, we will take a closer look at the following topics:
– Sensors
– Semiconductor-based photonics
– Energy harvesting
– Power devices
Additionally, we will discuss research activities in other areas of advanced functionalities, e. g. devices and technologies for high temperature applications. Finally we will conclude by reviewing strengths and gaps of European and International industries in this area and list some first ideas for potential fruitful research collaboration in the future with leading semiconductor countries.
Markus Pfeffer, Group Manager at Fraunhofer
Dr. Markus Pfeffer holds a diploma in Electrical Engineering and a PhD (Dr.-Ing.) with specialization in manufacturing optimization both from the University of Erlangen-Nuremberg. Since 2002 he has been working at Fraunhofer IISB in the Business Department Semiconductor Technology, where he is the fab manager of the Fraunhofer IISB Pi-Fab (SiC Processing and Prototype Fabrication) and he is in charge of quality and process control as well as founded research. He was/is involved in several national and international cooperative R&D projects in different functions.
Jyrki Kiihamäki, Research Manager at VTT
Dr. Jyrki Kiihamäki has worked for 35 years at VTT, Technical Research Centre of Finland, currently as a Co-Creation Manager at the Microelectronics and Quantum Technologies research area. He has led the silicon-on-insulator (SOI) MEMS and the MEMS teams 2006-2012. After that he has been in strategic research management positions. He is VTT representative at Aeneas and EPoSS industry associations and a member of Xecs TEG.
10:00 – Coffee Break
10:30
This presentation outlines key technological advancements in advanced compute. Beginning with an overview of current trends and challenges, we will look into the computing roadmap, analyzing new CMOS device architectures, emerging materials for FEOL and BEOL, the emergence of CMOS 2.0, next to innovations in memory technologies. Beyond conventional computing approaches, near or in-memory computing and quantum computing will be discussed. Additionally, we assess heterogeneous integration, from chiplets to functional backside, offering technical insights poised to reshape computational paradigms.
Nadine Collaert, Fellow at imec
Nadine Collaert is an imec fellow leading the advanced RF program, integrating III-V/III-N devices with CMOS for next-gen mobile communication. Previously, she directed the LOGIC Beyond Si program, focusing on novel CMOS devices and material-enabled approaches. With a PhD in electrical engineering from KU Leuven, she has been involved in research on FinFET and GAA devices, emerging memories, and biomedical transducers. She has over 500 publications and 15+ patents in device design and process technology.
11:15
In spite of large public and private investments the European semiconductor ecosystem is facing considerable challenges. These are multi-facetted and range from limitations in manufacturing capacity, in the available workforce and in the supply chains to risks associated with disruptive events and to worries about the environmental impact of the semiconductor industry. International cooperation between the EU and other regions will be of great benefit in this context, either to tackle common challenges together or to mitigate each other’s challenges in a balanced way. The ICOS-project has conducted a generic study about those challenges and about options for cooperation. This study will be published in a form of a whitepaper soon. It is now followed by an analysis of concrete options of cooperation with specific regions and on specific topics.
Roel Baets, Emeritus Full Professor at Univ. Ghent/imec
Roel Baets is an emeritus full professor at Ghent University and imec. For many years he has made contributions to research on integrated photonics (silicon, silicon nitride, III-V) and its applications in datacom/telecom as well as in medical and environmental sensing. He has founded and has chaired ePIXfab, the European Silicon Photonics Alliance, and continues to serve the silicon photonics community at large in advisory roles. He is a Fellow of IEEE, EOS and Optica. He has been recipient of amongst others the 2020 John Tyndall Award and the 2023 IEEE Photonics Award.
12:00 – Lunch
Organised with:
Chair – Francis Balestra, Grenoble INP/CNRS/SiNANO
13:45
14:00
Every 20 years the electronics industry undergoes a major transformation accelerated by large infusions of government funds all around the world. During these revolutionary times new technologies enable new products that propel the whole industry to a higher and unprecedented level of innovation and accelerated economic growth. A new symbiotic relation between system integration and technology innovation is presently epitomized by the AI revolution that will change all the aspects of society in the next 5 years. Do not stay on the sideline but be and active part of it!
Paolo A. Gargini, IRDS
Paolo A. Gargini
(IEEE Life-Fellow, JSAP Fellow and Chairman IRDS. Former Director of Technology Strategy at Intel))
In the 70s Dr. Gargini was a researcher at Stanford University and at Fairchild Camera and Instrument. In 1980 as manager of MPU technology at Intel transferred into manufacturing the iconic 80286 and 80386. In 1996, he became Director of Technology Strategy and responsible for worldwide consortia research until 2012. He was a member of Sematech, SRC, EUV LLC, EIDEC, ASET, IMEC and SIA Boards, and Chairman of the I300I and NRI. From 1998 to 2015, Dr. Gargini was Chairman of the ITRS sponsored by the WSC. Since 2016 he is the Chairman of the IRDS sponsored by IEEE.
14:30 (online)
GaN-based semiconductor devices are poised for a strong growth over the next few years. Powered by 5G infrastructure, military communications and industrial heating, the global RF GaN market is projected to grow at a 20% CAGR, while power GaN is projected to ramp up rapidly in consumer chargers, data centers and automotive to grow at a CAGR of 55%. India is a key target market for these materials with a projected market size of $300 million by 2028. Persistent R&D efforts and government initiatives have enabled a strong GaN technology capability. We at GEECI are leveraging indigenously developed GaN technology to build a commercial GaN foundry and a startup incubator that can enable a GaN ecosystem and serve growing requirements in high-speed communications and high-efficiency power conversion across sectors.
Sridhar Srinivasan, GEECI - IISc
Dr. Sridhar Srinivasan is the CEO of the Gallium Nitride Ecosystem Enabling Center and Incubator (GEECI) – at Indian Institute of Science, Bangalore. In his long stint in industrial and academic R&D roles, he has worked at GE’s Global Research Center leading techno-commercial programs for a range of semiconductor technologies particularly towards commercializing SiC power device technology. He has also worked with Gartner as a semiconductor industry analyst. Dr. Srinivasan received his PhD in Materials Science from Arizona State University in 2003 working on GaN optoelectronics.15:00
Low-energy, small molecular sensors detecting low-weight molecules in the atmosphere as well as expired air are key devices for internet-of-things (IoT) era. They can be utilized in various applications, such as environment monitoring and breath diagnosis. However, it is extremely difficult to make molecular sensors with low energy consumption, small size, and high molecular selectivity. In this talk, we will present recent research and development trends in molecular sensors, including our own research results. In particular, application-oriented development combined with big data analysis is a major trend worldwide, and research in this direction will also be presented.
Ken Uchida, Tokyo University
Ken Uchida received Ph.D. degrees in applied physics from the University of Tokyo. In 1995, he joined the Research and Development Center, Toshiba Corporation, Japan. In Toshiba, he studied device physics and carrier transport in nanoscale devices. In 2008, he moved to academia and worked for Tokyo Institute of Technology as an associate professor and Keio University as a professor. In 2018, he moved to The University of Tokyo, Tokyo, Japan, as a professor, where he has worked on low-energy sensors, device physics of cryo-CMOS devices for quantum computing, and advanced 3D FETs.
15:30 (online)
Shankar Kumar Selvaraja, Indian Institute of Science
16:00 – Coffee Break
16:30
Dr James Sexton, IBM Fellow
17:00
Heterogeneous 3D chiplet integration and memory computing are the key in edge devices for AI application. We have proposed a new 3D stacked AI chip with analog synapse circuits.
Mitsumasa Koyanagi, Tohoku University
Mitsumasa Koyanagi received a Ph.D. degree from Tohoku University in 1974. Since then he worked for Hitachi, Xerox, Hiroshima University and Tohoku University. He is currently a senior research fellow in Tohoku University.17:30 (online)
Amidst the global pursuit of net-zero objectives, Gallium Nitride (GaN) emerges as a pivotal device technology, revolutionizing RF and power electronics landscapes. In this talk, we unveil groundbreaking technological advancements in power and RF GaN device development, coupled with our state-of-the-art model development endeavors. Harnessing the potential of GaN, we aim to contribute to the global net-zero goals, elucidating its indispensable role in driving efficiency and sustainability. Through our research, we hope to accelerate the adoption of GaN in RF and power applications within Europe and India.
Sheikh Aamir Ahsan, National Institute of Technology (NIT), Srinagar
Sheikh Aamir Ahsan possesses expertise in state-of-the-art RF and power GaN SPICE models. Originating from the development of the ASM GaN model during his doctoral studies at IIT Kanpur, his team at NITSRI leads the advancement of power GaN technology through modeling and design enablement frameworks. Acting as a consultant for diverse industrial entities, his impact extends beyond academia, as his GaN research seamlessly integrates into commercial SPICE simulators, influencing the trajectory of GaN product development and application globally. He was awarded the Startup Research Grant in 2019 by the Science and Engineering Research Board, India.
18:00
Chair - Peter Ramm, Fraunhofer EMFT
Paolo A. Gargini, IRDS
Paolo A. Gargini
(IEEE Life-Fellow, JSAP Fellow and Chairman IRDS. Former Director of Technology Strategy at Intel))
In the 70s Dr. Gargini was a researcher at Stanford University and at Fairchild Camera and Instrument. In 1980 as manager of MPU technology at Intel transferred into manufacturing the iconic 80286 and 80386. In 1996, he became Director of Technology Strategy and responsible for worldwide consortia research until 2012. He was a member of Sematech, SRC, EUV LLC, EIDEC, ASET, IMEC and SIA Boards, and Chairman of the I300I and NRI. From 1998 to 2015, Dr. Gargini was Chairman of the ITRS sponsored by the WSC. Since 2016 he is the Chairman of the IRDS sponsored by IEEE.
Mitsumasa Koyanagi, Tohoku University
Mitsumasa Koyanagi received a Ph.D. degree from Tohoku University in 1974. Since then he worked for Hitachi, Xerox, Hiroshima University and Tohoku University. He is currently a senior research fellow in Tohoku University.Sridhar Srinivasan, GEECI - IISc
Dr. Sridhar Srinivasan is the CEO of the Gallium Nitride Ecosystem Enabling Center and Incubator (GEECI) – at Indian Institute of Science, Bangalore. In his long stint in industrial and academic R&D roles, he has worked at GE’s Global Research Center leading techno-commercial programs for a range of semiconductor technologies particularly towards commercializing SiC power device technology. He has also worked with Gartner as a semiconductor industry analyst. Dr. Srinivasan received his PhD in Materials Science from Arizona State University in 2003 working on GaN optoelectronics.Shankar Kumar Selvaraja, Indian Institute of Science
Ken Uchida, Tokyo University
Ken Uchida received Ph.D. degrees in applied physics from the University of Tokyo. In 1995, he joined the Research and Development Center, Toshiba Corporation, Japan. In Toshiba, he studied device physics and carrier transport in nanoscale devices. In 2008, he moved to academia and worked for Tokyo Institute of Technology as an associate professor and Keio University as a professor. In 2018, he moved to The University of Tokyo, Tokyo, Japan, as a professor, where he has worked on low-energy sensors, device physics of cryo-CMOS devices for quantum computing, and advanced 3D FETs.
James Sexton, IBM
19:00 – Networking Cocktail
TITLE: International Cooperation On Semiconductors START-END: January 2023 – December2025
EU CONTRIBUTION: 2, 99M€
TOPIC: HORIZON-CL4-2022-DIGITAL-EMERGING-01
Coordinator: Francis Balestra
ICOS has received funding (2023 – 2025) from the European Union’s Horizon Europe research and innovation programme under GA No 101092562.