8:30 – 9:00
9:00 – 10:20
Bio
Dr. Rainer Wessely is a diplomat for European Union. Since September 2021, he is posted as Digital and Research/Science Counsellor at the Delegation of the European Union to the Republic of Korea. From 2018 to 2024 he worked as Counsellor for Justice, Competition and Digital at the Delegation of the European Union to the United States in Washington, DC. Before this he served for four years as Assistant to Director General Johannes Laitenberger and Director General Alexander Italianer at DG Competititon in Brussels. Rainer worked several years as a senior associate at Hogan Lovells and has conducted numerous cartel investigations, working in the Cartel Directorate of DG Competition for many years. He holds a PhD in international trade law and an LLM in European and international law.
Bio
Dr. Sang Wan Ryu is Director of the Division of Semiconductor & Display Technology at the National Research Foundation of Korea (NRF). He holds B.S., M.S., and Ph.D degrees in physics from Seoul National University, with his doctoral work focusing on strained InGaAs(P)/InP materials and their application in optical communication laser diodes. Prior to joining NRF, he served as Professor of Physics at Chonnam National University since 2004 and worked as a Senior Researcher at ETRI. He also held a post as Research Associate at the University of Southern California. His expertise spans semiconductor materials, optoelectronic devices, and display technologies.
Abstract
Semiconductor is one of the strongest industries in Korea. As the industry has grown, we have developed our R&D activities in both basic science and advanced production technologies. At present, we are seeking closer international R&D cooperation to catch up with the ongoing internalization of the semiconductor chip manufacturing process. In this regard, the Korean governments have established Korea-EU and Korea-NSF(US) programs on advanced semiconductor chip, processing, and packaging technologies. In addition, we have announced a call for Korean researchers to propose international collaborative research projects on semiconductors, open to counterparts from all countries. We believe that our efforts to promote multinational collaborative research will lead to a stronger bond between countries in the semiconductor chip production network.
Bio
Ms. Ju Young KIM has been working for the EU Delegation to the Republic of Korea as a Policy Officer in Science, Technology, and Innovation since 2014. As Korean agent of the Directorate-General Research & Innovation of the European Commission, she is in charge of the entire EU-ROK cooperation in science, technology, research, innovation, digital, and higher education at the Delegation.
Before joining the EU Delegation, she worked for the National Research Foundation of Korea (NRF) from 2008 to 2014. At the NRF, she dealt with international cooperation activities across nations and programmes, including the USA, China, Japan, and the EU. In particular, she supported the EU-ROK science and technology policies by coordinating several policy projects such as KONNECT, KESTCAP, KORRIDOR, and KORANET under the EU Research & Innovation Framework Programme 7 (EU FP7).
She holds a Bachelor’s Degree in English from the Hanguk University of Foreign Studies and a Master’s in International conference management from the University of Westminster, London, UK.
Bio
Dr. Jari Kinaret was born in Finland and holds M.Sc. degrees in Theorical Physics and Electronical Engineering from the University of Oulu in 1986 and 1987, respectively, and a PhD in Physics from the Massachusetts Institute of Technology (MIT) in 1992. Prof. Kinaret has worked in various roles at research institutes and universities in Copenhagen, Denmark, and Gothenburg, Sweden.
From 2013 to 2023, he served as the Director of the Graphene Flagship, a one-billion-euro research project dedicated to exploring the potential of graphene. In October 2023, Prof. Jari Kinaret assumed the role of Executive Director at Chips Joint Undertaking (Chips JU), a European public-private partnership that supports research, development, innovation, and future manufacturing capacities in the European semiconductor ecosystem.
Bio
Career
Director, Aug. 2024 – Present
Secretary General, Nov. 2022 – Present
Executive Director, Dec.2023 – Present
Executive Vice President, Nov. 2020 – Jul. 2022
Principal Research Fellow, Apr. 2002 – Oct. 2020
Ph.D. in Electronics Engineering, Feb. 2002
M.S. in Electronics Engineering, Aug. 1996
B.S. in Electronics Engineering, Feb. 1992
Abstract
10:20 – 12:10
Bio
Dr. Dae Woon Kwon is an Associate Professor in the Department of Electrical Engineering at Hanyang University. He received his B.S. in Semiconductor Engineering from Kwangwoon University and M.S and Ph.D degrees in Electrical Engineering from Seoul National University, where his doctoral research focused on low-power tunneling FET biosensors for multiplexed sensing. His career includes academic roles at Inha University and postdoctoral research at UC Berkeley. He also has extensive industry exeperience as a senior engineer at Samsung Electronics and Intel’s NVM Solutions Group. His expertise lies in neuromorphic devices, biosensors, and oxide semiconductor device technologies.
Abstract
This research project aims to address the growing demand for transformer-based AI models by leveraging FeRAM arrays based on 1T-nC (or 1T-nF) structured ferroelectric capacitors developed by our team. Key device characteristics such as latency, on/off ratio, and energy consumption, along with peripheral circuit parameters, are incorporated into a system-level architectural exploration platform. The goal is to improve performance and energy efficiency when running Vision Transformers using FeRAM arrays. In contrast to previous CIM (Compute-In-Memory) studies, this project applies more complex datasets (e.g., CIFAR-10, ImageNet) to enable accuracy and energy efficiency analysis at a commercialization-ready level. This progress report outlines the ongoing joint research efforts between Korea and the EU to achieve these goals.
Bio
Dr Athanasios Dimoulas is Research Director at the National Center for Scientific Research DEMOKRITOS in Athens, Greece. He received his Ph.D in Applied Physics from the University of Crete in 1991, with a dissertation on the MBE growth and thermal strain of GaAs on silicon. He has held prestrigious international research positions, including Chair of Excellence at CEA/University of Grenoble-Alpes, visiting scientist at IBM Zurich, and research roles at CALTECH, University of Maryland, and University of Groningen. His expertise lies in advanced semiconductor materials and epitaxial growth technologies. Currently, he leads key research initiatives at NCSR Demokritos focusing on next-generation electronic materials and devices
Abstract
An overview of the Si-compatible Hafnia-based ferroelectric technology will be presented emphasizing its importance for energy efficient in-memory and bioinspired neuromorphic computing. The pioneering contributions to the field by European and Korean institutions will also be reviewed. Subsequently, the Korea-EU joint project ViTFOX will be presented. In brief, the project targets the design and fabrication of the main components of a Vision Transformer, namely a Compute-in Memory demonstrator, a circuit level simulator and a hardware-software cooptimization platform with ferroelectric oxides. The platform will support two types of emerging memories, high-density 3D FeRAM developed in Korea and epitaxial Ferroelectric Tunnel Junctions developed in EU, which will be presented in more detail.
Bio
Dr. Jong Hyeok Yoon is an Associate Professor in the Department of Electrical Engineering and Computer Science (EECS) at DGIST. He received his B.S, M.S and Ph.D degrees in Electrical Engineering from KAIST, graduating summa cum laude. His doctoral research focused on multistandards Ethernet transceiver ICs with fully channel-independant operation. He previously conducted postdoctoral research at the Georgia Institute of Technology and has held faculty positions at DGIST since 2021. His work centers on high-speed integrated circuits and energy-efficient communication systems.
Abstract
Autonomous vehicles, encompassing unmanned aerial vehicles (UAVs) and unmanned aerial mobility (UAMs), necessitate robust object detection methodologies to facilitate reliable navigation systems. While Time-of-Flight (ToF) LiDAR modules are extensively utilized for object detection in autonomous vehicles, they encounter substantial limitations, including elevated costs, restricted detection angles, and susceptibility to interference from external light sources. Conversely, Frequency-Modulated Continuous Wave (FMCW) solid-state LiDAR modules offer broader detection angles, resilience to interference, and the capability to measure the velocity of nearby objects, rendering them a superior alternative.
In this presentation, I will introduce the KR-EU collaborative project to develop neuromorphic computing systems for heterogeneously-integrated silicon photonics LiDAR. Notably, I will emphasize the role of the Korean consortium, which comprises the following features: 1) The development of FeFET-based compute-in-memory (CIM) accelerators for energy-efficient processing, 2) The design of optimized AI network architectures tailored for real-time semantic segmentation tasks, and 3) The creation of wireline/wireless peripheral circuits to facilitate seamless intra- and inter-agent communication.
Bio
With more than 20 years of experience in laser development and 15+ years of experience in photonic integrated circuit (PIC) development is recognized as one of the Photonics 100, the one hundred most innovative people of 2025 in the worldwide industry by the Electro Optics magazine. He was the first in the world to design, fabricate and characterize a hybridly integrated ultra narrow linewidth laser consisting of InP and SiN, which is nowadays an industry standard. He is consulted by industry leaders, institutes, and universities for his knowledge on this topic and accordingly, considered a thought leader in the field. He has co-authored over 80 papers and several patents. After working at LioniX International and spin-offs thereof for about 13 years, Ruud currently holds a scientific leadership position at imec, focusing on PIC system development.
Abstract
With self-driving cars quickly emerging as commercial commodity, there is no doubt anymore: autonomous driving vehicles will be the future. This requires 3D sensing of the environment in high resolution, high speed and high accuracy, using complementary and/or redundant measurement methods. Fusing techniques such as radio detection and ranging (RADAR), light detection and ranging (LiDAR) and camera images, seems obvious to achieve this goal. However, the sheer amount of data generated by all of these techniques requires a significant advancement in Neuromorphic edge-computing (in more popular words: Artificial Intelligence), next generation frequency modulated continuous wave (FMCW) LiDAR on low-cost, low power consuming and light weight photonic integrated circuitry (PIC), that can beam-steer and detect without any moving parts, and the integration of electronic integrated circuits (EIC) to drive and read-out and combine all signals.
In the NEHIL project, Korean and European researchers (both academic and industrial) aim to combine Neuromorphic edge-computing with data from a PIC-based FMCW LiDAR using FeFET-based compute-in-memory (CIM) accelerators, to support hybrid SNN/ANN models for semantic segmentation. These systems aim to reduce power consumption and improve the efficiency of the LiDAR system and can be used in autonomous vehicles and other applications. The integration of CIM, neuromorphic computing, FMCW LiDAR and photonic reservoir computing technologies will enable high-resolution, low-power, and cost-effective solutions for real-time data processing and object recognition.
Bio
Dr. Sung Ju Ryu is an Assistant Professor in the Department of Electrical and Electronic Engineering at Sogang University. He earned his Ph.D in Creative IT Engineering from POSTECH in 2021 and holds a B.S. in Electrical Engineering from Pusan National University. Before joining Sogang Univeristy, he served as Assistant Professor at Soongsil University and worked as a Staff Researcher at the Samsung Advanced Institute of Technology. His research interests include AI acceleration, edge computing and system-level hardware design for efficient intelligence.
Abstract
In this presentation, Energize team will introduce research on AI compression and hardware acceleration methods for Edge AI computing. The presenter explains a selective skipping algorithm for model compression and a high-throughput network scheme to maximize the computing speed on multi-PE arrays.
Bio
Dr. Dmitry Chigrin is currently Scientific Adviser at AMO GmbH and Adjunct Professor (Privatdozent) at the Department of Physics, RWTH Aachen University. He received his Doctorate in Electrical Engineering from the University of Wuppertal in 2004, and completed his habilitation in Theoretical Physics at Friedrich-Schiller-University Jena in 2014 with research on plasmonic nano and micro structures. He previously served as Senior Researcher and Group Leader at RWTH Aachen University and led a research group at the University of Wuppertal. His work focuses on nanophotonics, plasmonics, and advanced electromagnetic structures, bridging theory and device-level applications.
Abstract
The ENERGIZE project aims to develop energy-efficient neuromorphic hardware based on wafer-scale two-dimensional materials (2DMs) for next-generation edge AI applications. By integrating innovations across the semiconductor value chain – from material synthesis and device fabrication to circuit design and system-level integration – ENERGIZE addresses the limitations of conventional CMOS technologies in meeting the power and performance requirements of modern artificial intelligence. The project focuses on 2DM-based two- and three-terminal memristive devices that support in-memory computing and biologically inspired synaptic behaviour.
This presentation will highlight the interdisciplinary approach of ENERGIZE, which brings together leading European and Korean institutions in materials science, electronics, computer science and engineering. We will give an overview of the project’s objectives and report on our recent progress.
Bio
Dr. Sang Yoon Han is an Associate Professor in the Departments of Robotics & Mechatronics Engineering and Semiconductor Engineering at DGIST. He received his Ph.D in Electrical Engineering and Computer Sciences from the University of California, Berkeley, and earned his B.S in Electrical Engineering from Seoul National University, graduating summa cum laude. Prior to joining DGIST, he served as a postydoctoral researcher at KAIST, where he fulfilled Korea’s mandatory military service through academic research. His research interests include silicon photonics, integrated systems for AI acceleration, and next-generation semiconductor technologies.
Abstract
The acceleration and energy efficiency of AI computation have emerged as key challenges in the design of next-generation computing systems. In this presentation, I will introduce research on photonic circuit-based AI accelerators, which integrate silicon photonics, III-V compound semiconductors, and MEMS technologies as an alternative to overcome the limitations of electronic circuits in terms of computational density, power consumption, and thermal constraints.
13:20 – 15:30
Bio
Inge Asselberghs is Senior Manager at imec. She received the M.Sc. and Ph.D. degrees in chemistry from the University of Leuven, Leuven, Belgium. After a Post-Doctoral Fellowship in nonlinear optics, she joined imec in 2011, specializing in 2D-materials processing, device fabrication, and characterization. Her research interest covers new materials, process set-up, and integration pathfinding from the laboratory scale to fab infrastructure. Currently, she is the coordinator of the 2D-Pilot line and the NanoIC pilot line project.
Abstract
Research results and project outcomes published in literature offer valuable insights which can drive future technologies. A key question is how to translate and verify these findings in an industry relevant fabrication environment. R&D Pilot line projects aim to bridge the gap between lab and industry. This report presents the approach followed by the 2D-PL and NanoIC pilot lines.
Bio
Career
Associate Professor, Sep. 2023 – Present
Assistant Professor, Jul. 2019 – Aug. 2023
Postdoctoral Associate, Mar. 2016 – Jun. 2019
Ph. D. in Materials Science and Engineering, 2015
Abstract
‘Modern information technology accelerated data processing and storage, and scaled up their capacity since the introduction of integrated circuitry in the 1960s. Upon the technology-nodedriven miniaturization, we have witnessed that electronic device structure began to deviate from planar geometry and evolved into three-dimensional space, e.g., trigate FinFET and VNAND for better electrostatic control and massive data storage, respectively.
Following such device structural renovation, this talk will highlight how an emerging class of semiconductors, atomically-thin semiconductors, can be synergistically embedded to function as logic and nonvolatile memory operations in the More-Moore as well as in the More-than Moore domains. More importantly, as an integrated solution, I will introduce vapor-phase deposition (ALD and MOCVD) and a set of nanofabrication strategy tailored for target chalcogenide semiconductors and 3D device geometry. To be specific, I will initially address how our team approach to explore and solve fundamental scientific and engineering challenges in 3D adaptive MOCVD growth of 2D semiconductors and eventually monolithic integration of 2D vertical FETs in the complex device geometries.
Our recent works of hybrid-dual-gated electrochemical and multi-junction tunneling logic transistors will be followed to demonstrate field-controlled bimodal and steep-slope low-power switching, respectively.
In particular, the latter is enabled by phase-centric synthetic strategies where we achieve wafer-scale production of tin selenides (SnSe and SnSe2) in the 2D limit by utilizing a low-temperature MOCVD process. Next, I will present the wafer-scale growth of mono-elemental 2D tellurium (Te) thin films using an annealing-free, low-temperature ALD process. As-deposited Te films exhibit exceptional homogeneity, precise layer controllability, and 100 % step coverage in high aspect ratio nanostructures.
Additionally, we showcase an ALD-Te-based selector device with fast switching time, selectivity and low Vth. Capable of low-temperature processing, I will conclude with the latest research progress toward BEOL-compatible neuromorphic hardware, all based on synthetic chalcogenide thin films.
Bio
Dr. Markus Pfeffer, Fab Manger Pi-Fab, Fraunhofer Institute for Integrated Systems and Device Technology IISB.
Dr. Markus Pfeffer (male) holds a diploma in Electrical Engineering and a PhD (Dr.-Ing.) with specialization in manufacturing optimization both from the University of Erlangen-Nuremberg. Since 2002 he has been working at Fraunhofer IISB in the Business Department Semiconductor Technology, where he is the fab manager of the Fraunhofer IISB Pi-Fab (SiC Processing and Prototype Fabrication) and he is in charge of quality and process control as well as founded research. He was/is involved in several national and international cooperative R&D projects in different functions.
Abstract
The talk will present recent research activities of Fraunhofer IISB on Silicon Carbide (SiC) MOSFETs and provide an outlook on novel ultra-wide bandgap materials, such as Aluminum Nitride (AlN). Reducing resistive components is a primary measure for improving power switches. Recent architectural approaches toward low-resistivity SiC devices, including 3-dimensional channel arrangements and super-junction structures for high-blocking voltage and low-resistivity drift regions, will be discussed. The presentation will conclude with an outlook on material properties and related device architectures from an RTO perspective.
Bio
Career
Professor, Mar. 2015 – present
Manager, Mar. 2012 – Feb. 2014
Member of Technical Staff, Mar. 2008 – Feb. 2012
Post-Doc. and Research Scientist, Mar. 2005 – Feb. 2008
Post-Doc. Research Associate, Mar. 2004 – Feb. 2005
Ph. D. in Electrical Engineering, Feb. 2004
Dissertation, “Study on fabrication and characterization of InxGaAs/In0.52AlAs nano HEMT’s and their impact on high-speed IC’s”
Dissertation, “Development of a Library for MMICs Using P-HEMTs in the Millimeter-Wave Frequency Band”
Abstract
The talk will present recent research activities of Fraunhofer IISB on Silicon Carbide (SiC) MOSFETs and provide an outlook on novel ultra-wide bandgap materials, such as Aluminum Nitride (AlN). Reducing resistive components is a primary measure for improving power switches. Recent architectural approaches toward low-resistivity SiC devices, including 3-dimensional channel arrangements and super-junction structures for high-blocking voltage and low-resistivity drift regions, will be discussed. The presentation will conclude with an outlook on material properties and related device architectures from an RTO perspective.
Bio
In 2019, Emiel graduated from the Master in Engineering Physics at Ghent University. In his final Master year, he got introduced to world of integrated photonics and for his Master thesis he worked on on-chip Raman spectroscopy at the Photonics Research Group with Prof. Roel Baets. After graduation, he decided to continue to work on sensing applications enabled by integrated photonics and he started his PhD in 2020 on silicon photonics-based Laser Doppler Vibrometry for non-contact photoacoustics at the Photonics Research Group of Ghent University and IMEC. This work has led to multiple journal publications and a patent. As from 2024, Emiel started working as business developer for the micro-transfer printing activities at Ghent-University and IMEC. Together with prof. Gunther Roelkens, he leads the business activities of Transverse, the wafer scale pilot line for micro-transfer printing. This pilot line supports companies worldwide in establishing micro-transfer printing as a key technique for advanced integration.
Abstract
Next-generation photonic integrated circuits require the heterogeneous integration of key components that cannot be readily realized in a CMOS environment, such as III-V semiconductor optical amplifiers and lasers, efficient electro-optic modulators, and optical isolators. Silicon and silicon nitride photonic platforms offer scalability and cost-effectiveness but lack essential active functionalities. Micro-transfer printing provides a scalable, high-precision method to integrate these diverse materials and devices, enabling compact, high-performance photonic circuits. In this talk, we discuss the principles of micro-transfer printing, its advantages over conventional integration techniques, and its role in advancing applications in telecommunications, data centers, LiDAR, biomedical sensing, and quantum technologies.
Bio
Career
Professor, 2024 – Present
Professor, 2012 – 2024
Research Associate, 2011 – 2012
Ph.D. in Materials Science and Engineering, 2004 – 2011
B.S. in Materials Science and Engineering, 1998 – 2004
Abstract
Epitaxy is a key technique for fabricating single-crystalline thin films on substrates via strong chemical bonding. These covalent bonds extend the crystal symmetry and orientation of the underlying wafer into the epitaxial layer, enabling high-performance semiconductor devices. However, the very nature of these strong bonds makes it difficult to separate the epitaxial layer from the substrate. Given that the epitaxial layer is typically only a few microns thick—compared to several hundred microns for the wafer—the substrate becomes a substantial waste of material and space in high-density microelectronic architectures. Moreover, while epitaxy excels in forming high-quality semiconductors, it poses challenges for heterogeneous integration, which is critical for multifunctional device systems.
In this talk, we introduce novel epitaxial growth strategies that avoid covalent bonding at the interface—namely, van der Waals epitaxy and remote epitaxy.
These methods offer promising pathways for the high-density integration of diverse semiconductor devices. As a demonstration, we present an ultrahigh-resolution full-color display based on a vertically stacked R/G/B pixel architecture.
Using non-covalent epitaxy, we grew red, green, and blue light-emitting diode (LED) epilayers that were subsequently delaminated from their native wafers via simple mechanical exfoliation.
These freestanding LED layers were then vertically stacked and patterned via photolithography to form pixel arrays. As a result, we achieved full-color displays with a pixel density of 5,100 pixels per inch (ppi).
Additionally, we highlight the advantage of remote epitaxy in obtaining excellent crystal quality of the grown layers, further emphasizing its potential in advanced semiconductor integration.
Bio
BALESTRA Francis, CNRS Research Director at CROMA, is Director Emeritus of the European SiNANO Institute and President of IEEE Electron Device Society France, and has been Director of several Research labs. He coordinated many European Projects (ICOS, NEREID, NANOFUNCTION, NANOSIL, etc.) that have represented unprecedented collaborations in Europe in the field of Nanoelectronics. He founded and organized many international Conferences, and has co-authored more than 500 publications. He is member of several European Scientific Councils, of the Advisory Committees of International Journals and of the IRDS (International Roadmap for Devices and Systems) International Roadmap Committee as representative of Europe.
Abstract
This presentation will deal with the Horizon Europe ICOS project dedicated to International Cooperation On Semiconductors. International cooperation is key for speeding up technological innovation, reducing cost by avoiding duplicated research, boosting the resilience of the semiconductor value and supply chains, and is one of the objectives of the EU Chips Act. The objectives and first important ICOS results will be highlighted, including the analysis of the semiconductor economic and technological landscapes in Europe and leading semiconductor Countries, the identification of important technological areas for potential cooperation and the proposition of opportunities for bilateral or multilateral research collaborations, particularly in the areas of advanced functionalities and computing.
15:30 – 16:35
Bio
Seok-Jae Lee is currently Executive Vice President and Principal Researcher in the Division of Nano Convergence Technology Development at the National NanoFab Center (NNFC), South Korea. He received his Ph.D. in Chemical and Biomolecular Engineering from KAIST in 2004. His current research focuses on the development of semiconductor-based nanomedical, biosensor and biochip technologies. He has co-authored over 100 journal publications and holds more than 120 patents. He has received numerous national awards for his research achievements and has served as a committee member of NANO Korea, Korea BioChip Society.
Abstract
National NanoFab Center (NNFC) is the leading public organization providing semiconductor technology services in South Korea. Our mission is to offer technology platform services to industry, academia, and R&D institutes in the fields of silicon-based semiconductors, MEMS, bio-healthcare, metrology, and nano new materials.
Established in 2004 as an affiliated organization of the Korea Advanced Institute of Science and Technology (KAIST), NNFC has been committed to supporting domestic and international industries, academic institutions, and research organizations through its world-class infrastructure, based on 200 mm and 300 mm fabrication equipment.
To contribute to future technological advancements, NNFC actively collaborates with both domestic and international academia and research institutions to develop key technology platforms, including semiconductor-based solid-state batteries, nano-medical devices and silicon quantum device platforms.
Finally, NNFC continues to expand the shared use of its infrastructure with global partners, aiming to strengthen support for technology convergence and commercialization across its service domains.
Bio
Career
Seongnam, Korea
Assistant / Associate Professor, Mar. 2020 – Feb. 2025
• Materials Research Center, Northwestern University, Evanston, USA
Postdoctoral Researcher, Jan. 2019 – Oct. 2019
• Holst Centre, Eindhoven, Netherlands
Visiting Researcher, Jan. 2015 – Aug. 2015
Education
Dissertation: “Split-Gate Ambipolar Transistors”
• Hanyang University, Seoul, Korea
B. S. in Electronic Engineering, Feb. 2014,
Abstract
Gaussian distributions are fundamental to probabilistic models, yet their hardware realization remains elusive. Existing solutions based on heterojunction anti-ambipolar transistors suffer from structural asymmetry, inconsistent transport properties, and limited tunability. Here, we introduce a single-material, single-channel split-gate Gaussian-mirroring transistor (SC-SMT) that generates highly symmetric, near-Gaussian transfer curves under reversal gate biasing. Independent gate control enables precise tuning of amplitude, mean, and standard deviation, achieving >99.99% cosine similarity with ideal Gaussian profiles. To validate functionality, we integrated the SC-SMT onto a printed circuit board with real-time current sensing and DAC-based gate control.
This system implements an analog Gaussian Naive Bayes classifier, distinguishing deepfake from authentic voices with 82% accuracy on the ASVspoof2019 dataset. Further, the device exhibits quadratic-order output scaling with dual-gate input, supporting analog vector–vector multiplication. We demonstrate its use in a memristor crossbar array for transformer attention scoring, eliminating the need for matrix projection.
These results establish the SC-SMT as a compact, tunable hardware primitive for real-time probabilistic inference and neuromorphic acceleration.
Bio
Career
CTO, May 2024 – Present
CTO, Dec. 2019 – Feb. 2024
CEO, Jan. 2017 – Dec. 2019
Technical Manager, Aug. 2003 – Dec. 2017
Senior Researcher, Mar. 1992 – Jul. 2003
Education
Ph.D. in Chemical Engineering, Feb. 2000
Dissertation, “Synthesis and electrical properties of PEDOT/PSSA conducting polymer complex”
Abstract
The development of via-hole-less interconnection technology is important for the successful implementation of vertical integration technology of semiconductor devices, and this interconnection technology requires the introduction of micro-bump conductive ball array technology into RDL technology.
The research team of VEXAN Steel Co., Ltd. is developing this micro-bump conductive ball array bonding technology using micro-particle alignment and transfer technology.
In particular, the development of bump materials and bump formation technology according to the miniaturization of bump size is essential for the development of 3D packaging technology, and the micro-bump array technology of this research team is pursuing a 10μm pitch in the future, so it is considered to be suitable as a bonding solution for the next generation of 3D packaging.
16:35 – 18:35
Bio
Dr Hee Dae Kim is an Associate Professor of Physics at Jeonbuk National University. He earned his Ph.D in Physics from the University of Oxford and a B.Sc, in Physics from the University of Texas at Austin. He has held research and teaching positions at leading institutions including the University of Oxford (Research Associate/Lecturer), IFW-Dresden in Germany (Postdoctoral Researcher, independant position), Arizona State University (Research Professor), Hokkaido Univeristy in Japan (Assistant Professor), and Northeast Normal in China (Distinguished Professor). He has also served as a visiting professor at Oxford. Research interests: Optical spectroscopy of quantum dots, Surface plasmonbased photonic application, Time-resolved quantum optical analysis.
Abstract
Recent advances in droplet epitaxy (DE) methods have enable the growth of diverse nanostructures including coupled quantum dots (CQDs). CQDs are regarded as crucial building block for the development of scalable quantum devices, as the coupling between adjacent quantum dots can be controlled both electrically and optically [1-4]. In such systems, the tunneling interaction is typically much weaker in laterally coupled QDs compared to vertically coupled ones, where wavefunction overlap is more likely to occur. Although tunneling-induced coupling is negligible due the relatively large inter-dot distance in laterally configurations, excitons localized in the individual QDs can still interect though dipole-dipole coupling.
This dipole-dipole interaction is primarily mediated by two mechanisms: Foster energy transfer (FRET) and the direct Coulomb interaction. Both mechanisms exhibit a ~1/R12 dependance on the inter-dot distance (~R12), yet their effectiveness is highly sensitive to the spatial configuration of the excitonic dipoles, particularly their orientation and charge distribution. Our findings suggest that excitons and biexctions in laterally coupled QDs exhibit controllable polarization properties, opening the possibility for tunable anisotropic emission through optical manipulation.
Bio
Dr. Chang Lyoul Lee is the Head of the Advanced Photonics Research Institute (APRI) at the Gwandju Institute of Science and Technology (GIST), where he also serves as Director of R&D Coordination and a member of the Integrity Advisory Board. He received his Ph.D in Materials Science and Engineering from GIST and has held visiting research positions at the University of Cambridge and Rice University. His research focuses on quantum dot-based optoelectronic devices, ultrafast optical spectroscopy, and organic/inorganic hybrid materials for light-emitting and photovoltaic applications. He has authored numerous high-impact publications and received multiple awards including the 2023 Distinguished Contribution to Science and Technology Award from the Minitry of Science and ICT.
Abstract
Halide perovskite nanocrystals (PNCs) have recently attracted lots of attention due to their excellent opto-electronics properties. Blue-emissive PNCs can be achieved via either size reduction or halide exchange. Low-temperature synthesis or ligand engineering is widely used to reduce the particle size of PNCs, leading to blue emission. However, these methods are limited by high defect density and board FWHM, which causes low PLQY and structural degradation. In this work, the particle siez of CH3NH3PbBR3NCs was reduced by controlling the interaction between ligands and anti-solvents with different dipole moments, enabling the fabrication of highly efficient blue-emissive PNCs. Additionally, halide exchange was employed to achieve blue-emitting PNCs, but high defect density was observed in the chlorine (CI)-exchanged PNCs. To address this issue, a short ligand containing chlorine was applied, which suppressed defect formation and significantly imprived the structural stability of the PNCs, resulting in blue emission at approximately 480nm.
TITLE: International Cooperation On Semiconductors START-END: January 2023 – December2025
EU CONTRIBUTION: 2, 99M€
TOPIC: HORIZON-CL4-2022-DIGITAL-EMERGING-01
Coordinator: Francis Balestra
ICOS has received funding (2023 – 2025) from the European Union’s Horizon Europe research and innovation programme under GA No 101092562.