13:40 – 14:05
Bio Pierre Chastanet
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Bio Katherine Power
Katie is responsible for research and innovation relations with Australia, New Zealand, and the pacific region in DG RTD, Unit 04.
Prior to working in DG RTD, Katie was a Member of Cabinet for Commissioner Mairead McGuinness and was responsible for sanctions implementation, anti-money laundering and sustainable finance.
She also spent five years working in the European Parliament as a Parliamentary Assistant advising on the Environment and Health, and Agriculture committees.
Bio Aaron Voon-Yew Thean
Aaron Voon-Yew Thean is the GlobalFoundries Professor of Electrical and Computer Engineering at the National University of Singapore (NUS). Currently the Deputy President (Academic Affairs) and Provost of NUS, he was the Founding Dean of NUS College of Design and Engineering (2022), and the Dean of the Faculty of Engineering (2019). Aaron founded the $70M Applied Materials-NUS Corporate Laboratory at NUS in 2018, to co-innovate with US-based Applied Materials on next-generation semiconductor materials. Aaron currently directs the Singapore Hybrid-Integrated Next-Generation μ-Electronics (SHINE) Centre, a National Medium-Sized Research Center funded by the Singapore National Research Foundation (NRF) to innovate on Heterogeneous Integration. In 2016, Aaron was the Vice President of Logic Technologies at IMEC. Aaron graduated from University of Illinois at Champaign-Urbana, USA, where he received his B.Sc. (Highest Honors), M.Sc., and Ph.D. degrees in Electrical Engineering (Edmund J. James Scholar). He has published over 400 technical papers and holds more than 50 US patents. Aaron was recognized as NRF’s Returning Singapore Scientist and more recently, a fellow of the US National Academy of Inventors.
14:05 – 16:10
Bio
Professor Mikael Östling
received his MSc and the PhD degrees from Uppsala University, Sweden. He holds a position as professor in solid state electronics at KTH, Royal Institute of Technology in Stockholm, Sweden. He was the deputy president of KTH 2017-2022. He previously held the position as dean of the School of Information and Communication Technology, KTH, and head of department. Mikael was a senior visiting Fulbright Scholar at Stanford University, and a visiting professor with the University of Florida, Gainesville. He was a director of the SiNANO Institute from its founding and for two consecutive mandate periods and is now the Chair of the General Assembly. Mikael was an editor of the IEEE Electron Device Letters and EiC of IEEE J-EDS. He is a Life Fellow of the IEEE and Fellow of the Electrochemical Society.
Abstract
The rapid electrification of our society is in full swing. The need for better energy efficiency is urgent. The progress in the development of emerging new device technologies is very promising. Semiconductor materials with wide bandgaps are maturing fast. Both gallium nitride (GaN) and silicon carbide (SiC) devices are today to be found in several commercial applications such as power supplies for computers and charging equipment for handheld units. High power applications are also rolling out for the automotive industry and EV charging networks. Yet, much more development is needed and expected. The material quality is far from perfect, but promising. This talk will focus on the status and projections on high voltage SiC and GaN device technology and discuss the different device types considered for the electrical infrastructure. A brief update regarding the activities for the EU Chips JU Pilot Line 4 will be included.
Bio
Dr Navab Singh is the Deputy Executive Director (Research) at the Institute of Microelectronics, A*STAR, Singapore. He started his career in semiconductors as a Lithography Process Engineer in 1996 after graduating with a Master of Technology degree in Solid State Materials from the Indian Institute of Technology Delhi, India. Since then, Dr Singh has worked on advancing specialty technologies to new frontiers in the fields of wide bandgap semiconductors, sensors & actuators, photonics, and heterogeneous integration. He obtained his PhD degree with work in Computer and Electrical Engineering from the National University of Singapore in 2008. He has authored or coauthored about 300 publications and holds an h-index of 48. Dr Singh is a recipient of the George E. Smith Award 2007 and the Singapore National Technology Award 2008, for his pioneer work on nanowire gate-all-around transistors. He was also presented with the TALENT award 2010 by A*STAR for Leading, Educating and Nurturing Talents at IME.
Abstract
Shortening the time from innovation to industrialization is essential. A*STAR, Singapore is accelerating the development of More-than-Moore applications through its R&D Catapult platforms, namely SiC Power, Piezo-MEMS, Advanced Photonics, and Advanced Packaging.
This talk will discuss A*STAR’s advances in SiC Power and piezoMEMS with comprehensive technology roadmap and offerings. Our 8” open innovation SiC process line, with specialty in lithography, epitaxy, and channeling implant, is qualified through 1200V class planar and trench gate power MOSFETS. The Piezo-MEMS platforms are developed in world’s first Piezo-speciality ‘Lab-in-Fab’, where R&D and manufacturing are performed in the same fab – the same equipment, talent, and recipes to shorten prototyping and product development timelines.
Bio
Emiel is Business Developer at the photonics research group of Ghent University and IMEC.Abstract
There is a growing demand for photonics due to its potential to meet the ever-increasing need for higher bandwidth and lower latency interconnects in data centers and for high-performance computing, through the manipulation of light on a chip. Silicon photonics achieves this by employing the massively scalable and low-cost CMOS technology. However, silicon lacks the material properties needed for light generation and very fast modulation. This is one of the reasons for the growing interest in heterogeneous integration in semiconductor photonics. This talk will first introduce silicon photonics and move on to discuss the recent trend in heterogeneous integration, focusing on transfer printing technology.
Bio
Dr Navab Singh is the Deputy Executive Director (Research) at the Institute of Microelectronics, A*STAR, Singapore. He started his career in semiconductors as a Lithography Process Engineer in 1996 after graduating with a Master of Technology degree in Solid State Materials from the Indian Institute of Technology Delhi, India. Since then, Dr Singh has worked on advancing specialty technologies to new frontiers in the fields of wide bandgap semiconductors, sensors & actuators, photonics, and heterogeneous integration. He obtained his PhD degree with work in Computer and Electrical Engineering from the National University of Singapore in 2008. He has authored or coauthored about 300 publications and holds an h-index of 48. Dr Singh is a recipient of the George E. Smith Award 2007 and the Singapore National Technology Award 2008, for his pioneer work on nanowire gate-all-around transistors. He was also presented with the TALENT award 2010 by A*STAR for Leading, Educating and Nurturing Talents at IME.
Abstract
Shortening the time from innovation to industrialization is essential. A*STAR, Singapore is accelerating the development of More-than-Moore applications through its R&D Catapult platforms, namely SiC Power, Piezo-MEMS, Advanced Photonics, and Advanced Packaging.
This talk will discuss A*STAR’s advances in Photonics and Flat Optics with comprehensive technology roadmap and offerings. Through Photonics Heterogeneous Integration (PHI) we aim to combine the best optical materials and devices – such as lasers, modulators, detectors, and waveguides – onto a single chip to enable high-speed, compact, and energy-efficient photonic systems. Each material offers unique advantages: silicon is low-cost and scalable, III-V semiconductors are excellent light sources, and lithium niobate allows ultra-fast signal modulation. PHI integrates these diverse components using advanced techniques like die-to-wafer bonding and wafer-scale processing, allowing them to work seamlessly together on one platform. Under Flat Optics umbrella, using 12” immersion lithography system, we have integrated Si, SiN and TiO2 nanoantennas on glass wafer to achieve various optical function covering wide range of wavelength for different applications.
Bio
Anna Szerling, PhD, DSc, is the Director of the Nanotechnology Center and leads the GaN-based Devices Research Group at the Łukasiewicz Research Network – Institute of Microelectronics and Photonics. Since 2002, she has focused on developing semiconductor technologies, starting with bipolar semiconductor lasers and later transitioning to quantum cascade lasers. Since 2014, in addition to her work on QCLs, she has been involved in research on III-V devices for optoelectronics, high-frequency applications (GaN-based devices), high-power electronics (GaN-based devices), biosensors, the processing technology of photonic structures, VCSELs, and new types of photonic devices. She has made significant contributions to the field, including 9 Polish patents and over 100 conference presentations. Her work has been cited 373 times, and she has a Hirsch index of 12.
Weronika Głowadzka
Abstract
The Łukasiewicz Research Network – Institute of Microelectronics and Photonics (Ł-IMiF) specializes in advanced semiconductor and photonic technologies, including GaN-based devices, novel laser architectures, and scalable photonic structures. We develop and prototype VCSELs not only for sensing but also for neuromorphic computing, quantum technologies, atomic clocks, and optical communications. Our work includes nonlinear and polaritonic components, nanolasers, and photonic systems suitable for chip-level integration. Ł-IMiF supports full-cycle development—from material growth to device-level demonstration—and contributes to multidisciplinary European projects. Our capabilities position us as a strong partner for next-generation semiconductor–photonics convergence across computing, communications, and security domains.
16:40 – 18:20
Bio
Urmimala Chatterjee received her bachelor’s degree from WBUT, India and master’s degree from NTU-TUM, Munich. After that she pursued her PhD in ESAT, KU Leuven on power converter design for PV application. Before joining IMEC, she works few years in TAS, Belgium on discrete circuit design for space electronics. Presently in IMEC she is working in GaN power electronics, mainly responsible for GaN IC activities and device design.
Abstract
Although discrete GaN devices today dominate the GaN market, monolithically integrated GaN power IC fully utilizes the fast-switching capability of GaN technology by reducing the parasitic and ringing, that enables a fast efficient switching operation. The goal of this JRA activity is to design compact integrated circuits by using all GaN technologies and to improve the performance of the IC together with the improved compact modelling and realizing advanced packaging of the IC. In this talk we will present different GANIC design activities and compact modelling progress that also enables optimisation of GaN device design.
Bio Aaron Voon-Yew Thean
Aaron Voon-Yew Thean is the GlobalFoundries Professor of Electrical and Computer Engineering at the National University of Singapore (NUS). Currently the Deputy President (Academic Affairs) and Provost of NUS, he was the Founding Dean of NUS College of Design and Engineering (2022), and the Dean of the Faculty of Engineering (2019). Aaron founded the $70M Applied Materials-NUS Corporate Laboratory at NUS in 2018, to co-innovate with US-based Applied Materials on next-generation semiconductor materials. Aaron currently directs the Singapore Hybrid-Integrated Next-Generation μ-Electronics (SHINE) Centre, a National Medium-Sized Research Center funded by the Singapore National Research Foundation (NRF) to innovate on Heterogeneous Integration. In 2016, Aaron was the Vice President of Logic Technologies at IMEC. Aaron graduated from University of Illinois at Champaign-Urbana, USA, where he received his B.Sc. (Highest Honors), M.Sc., and Ph.D. degrees in Electrical Engineering (Edmund J. James Scholar). He has published over 400 technical papers and holds more than 50 US patents. Aaron was recognized as NRF’s Returning Singapore Scientist and more recently, a fellow of the US National Academy of Inventors.
Abstract
Singapore Hybrid-Integrated Next-Generation Microelectronics (SHINE) Center established in 2021, is one of Singapore National Research Foundation’s mid-size research center. Based in both National University of Singapore and Nanyang Technological University of Singapore, the center focus on a range of research topics that spans system/circuits to device, and materials for heterogeneous integration. The center also develops hybrid integration process for flexible-hybrid electronics and photonics. SHINE works closely with selected Industrial partners to develop disruptive process integration solutions relevant for their next-generation technologies. In this talk, we will review some of these key activities.
Bio
Prof. Francisco Gamiz, Physics graduate with honors (National Award, 1991) and Ph.D. (Extraordinary Award, 1994) from the University of Granada (UGR), began his research in Monte Carlo simulations of semiconductor devices, collaborating internationally with IBM, TU Wien, Glasgow University, and Grenoble INP. He coordinated the EUROSOI and EUROSOI+ projects, founding the EUROSOI-ULIS conference series, and has contributed to European nanoelectronics as a Governing Board member of the SINANO Institute. With more than €15M in funding secured since 2010, he leads the Nanoelectronics, Graphene, and 2D Materials Lab at CITIC-UGR. Prof. Gamiz have collaborated with SOITEC, Imec, CEA-Leti, STMicroelectronics, and GlobalFoundries, KIST, NYCU University, participating in key EU industrial projects. Currently, he heads the +QCHIP University Chair under the Spanish Chip Law and advises several EU Marie Curie grants, driving innovation in semiconductor technologies. He is also a member of the Science Academy of Granada.
Abstract
Two-dimensional materials (2DMs), like graphene, offer outstanding electronic, optical, and sensing properties but face integration challenges with mature silicon technologies. This talk explores their co-integration with CMOS platforms to enable advanced photonics, biosensing, and flexible electronics. We present efforts at the University of Granada toward scalable 2DM-based sensors, eNVM, and optoelectronic systems for healthcare, environmental monitoring, and computing. By addressing key fabrication barriers, these projects highlight the potential of 2DMs to drive More-than-Moore innovation and meet real-world demands, positioning them as key players in the post-CMOS era.
Bio
Stephan Suckow obtained his PhD in Physics from RWTH Aachen University in 2012, joined AMO GmbH in 2015, became the vice head of the Nanophotonics group in 2018 and is leading the group since 2022. He coordinated the Horizon 2020 project POSEIDON and several German projects and was the technical coordinator of the H2020 project GRACED. The h-index of his publications is 15.
Abstract
The talk focusses on an overview of possible mechanisms for photonic smart sensing and gives a few examples. The topics include spectroscopy, interferometry and neuromorphic photonics.
9:00 – 12:00
Bio
Chuan Seng Tan is a Professor of Electronic Engineering at the School of Electrical and Electronic Engineering at Nanyang Technological University, Singapore. He received his PhD from MIT in 2006. Currently, he is working on process technology of three-dimensional integrated circuits (3-D ICs), as well as engineered substrate (Si/Ge/Sn) for group-IV photonics. He has numerous publications (journal and conference) and IPs on 3-D technology and engineered substrates. Nine of his inventions have since been licensed to a spin-off company. He co-edited/co-authored five books on 3D packaging technology.
He is a Fellow of IEEE (Class of 2022) and a recipient of the Exceptional Technical Achievement Award from the IEEE Electronics Packaging Society (EPS) in 2019. He was a Distinguished Lecturer with IEEE-EPS from 2019-2023. He is a Fellow of the International Microelectronics Assembly and Packaging Society (IMAPS) since 2019 and a recipient of the William D. Ashman – John A. Wagnon Technical Achievement Award in 2020.
He was the Chair of the Interconnections Sub-Committee for ECTC’2021. He was the General Chair of the 2020 IEEE Electronics Packaging Technology Conference (EPTC). He is currently an Associate Editor of IEEE Transactions on Components, Packaging and Manufacturing Technology, and received the Best AE Award in 2021. He is a member of the Technical Working Group of the Heterogeneous Integration Roadmap (HIR) on wafer-level packaging. He serves as an elected Member-at-Large to the IEEE EPS Board of Governors from 2022-2024.
Abstract
Increasingly, system level performance enhancement is complemented with functional diversification. This talk covers our work in engineered substrate (X-OI) and advanced packaging (TSV, bonding) to achieve the above goal. We will discuss example demonstrators such as GaN-LED on Silicon CMOS, ion-trap on silicon interposer, as well as a more recent proposal on triple integration of optics, III-V and silicon.
Bio
Emmanuel Ollier is Program Manager in CEA-Leti Silicon Components Division and former Head of the 3D Integration Technologies Laboratory, where he focused on heterogeneous integration in edge AI, high-performance computing, RF communications and IoT. He previously worked at NXP, Atmel, EM Microelectronics and Thales. He holds 22 patents and has authored 45 papers and communications in international conferences. He earned a PhD in Material Sciences from the Technical University of Compiègne (France) and an Engineering degree from the Physics and Chemistry Engineering French National School.
Abstract
Since ITRS became IRDS in 2017 to follow the trend of microelectronic system integration, advanced packaging technologies and architectures have undergone major revolutions. The SoC (System–on-chip) architectures are now evolving towards Chiplet architectures. Functions are partitioned into different chips to take advantage of the best of each technology and reduce time to market. This trend modifies the way technologies are developed and manufactured. At the same time, it transforms the interactions and business models into the microelectronic ecosystem. This presentation will highlight the associated challenges in terms of design, technology development, wafer processing and testing and how CEA-Leti is addressing them.
Bio
Dr. Evgeny Zamburg is a Senior Research Fellow at the Singapore Hybrid-Integrated Next-Generation µ-Electronics (SHINE) Centre, where he leads research on advanced packaging, thermal management, and flexible high-power electronic systems. He received his Ph.D. in microelectronics in 2015 from Southern Federal University, Russia.
Throughout his career, Dr. Zamburg has held prestigious research fellowships at leading institutions around the world, including the Technical University of Munich (2012), IBM Research – Zurich (2013), the National University of Singapore (2014), National Chiao Tung University in Taiwan (2016), and the Swiss Federal Institute of Technology Lausanne (2016–2017). His interdisciplinary expertise spans microelectronics, nanofabrication, system integration, and novel materials.
At SHINE, he is actively involved in collaborative projects with industry and academia, focusing on enabling next-generation microelectronic systems through hybrid integration, system-technology co-design, and innovative interposer and sensor technologies.
Abstract
The rapid growth of AI, RF, and 3D chip technologies has led to soaring power densities—reaching several thousand watts per chip—making thermal management a critical challenge. Without effective cooling, chips risk overheating, performance loss, and even physical damage. We proposed novel solutions for managing heat at every stage of the chip lifecycle. At the wafer level, we developed a temperature control system that prevents thermal stress during extreme testing conditions. For packaging, we propose a high-conductivity SiC-based interposer to dissipate heat efficiently. At the system level, we demonstrate advanced passive spreaders, magnetic ferrofluid cooling without pumps, and microchannel heat pipes compatible with standard CMOS processes. Together, these innovations enable more reliable, compact, and powerful computing systems
Bio
Dr Navab Singh is the Deputy Executive Director (Research) at the Institute of Microelectronics, A*STAR, Singapore. He started his career in semiconductors as a Lithography Process Engineer in 1996 after graduating with a Master of Technology degree in Solid State Materials from the Indian Institute of Technology Delhi, India. Since then, Dr Singh has worked on advancing specialty technologies to new frontiers in the fields of wide bandgap semiconductors, sensors & actuators, photonics, and heterogeneous integration. He obtained his PhD degree with work in Computer and Electrical Engineering from the National University of Singapore in 2008. He has authored or coauthored about 300 publications and holds an h-index of 48. Dr Singh is a recipient of the George E. Smith Award 2007 and the Singapore National Technology Award 2008, for his pioneer work on nanowire gate-all-around transistors. He was also presented with the TALENT award 2010 by A*STAR for Leading, Educating and Nurturing Talents at IME.
Abstract
Shortening the time from innovation to industrialization is essential. A*STAR, Singapore is accelerating the development of More-than-Moore applications through its R&D Catapult platforms, namely SiC Power, Piezo-MEMS, Advanced Photonics, and Advanced Packaging.
This talk will discuss A*STAR’s Advanced Packaging platforms with comprehensive technology roadmap and offerings. Our advanced packaging platforms address system scaling towards trillions of transistors in a single energy efficient package and provide options to build optical engines, through heterogeneous integration in fan-out, 2.5D interposer, and C2W and W2W 3D format. Platforms are available for academic and fabless innovators along with a path forward to high volume manufacturing.
TITLE: International Cooperation On Semiconductors START-END: January 2023 – December2025
EU CONTRIBUTION: 2, 99M€
TOPIC: HORIZON-CL4-2022-DIGITAL-EMERGING-01
Coordinator: Francis Balestra
ICOS has received funding (2023 – 2025) from the European Union’s Horizon Europe research and innovation programme under GA No 101092562.