EU – India Joint Researchers Workshop on Semiconductors

October 9th – Brussels, Belgium

Start

9:00

OPENING AND POLICY SESSION

9:20

SESSION 1 – MORE THAN MOOR FUNCTIONALITIES

9:30

– GaN Technology for Power Electronics Applications
GaN technology can drive the high frequency operation for power circuits beyond today’s limit that facilitates to build a smaller, lighter and more cost-effective solution compared to its other silicon alternatives. This talk will give you a brief of IMEC’s different GaN technology platforms for the discrete power devices. Besides this will also cover the aspects of monolithic integration in this technology. In order to fully utilize the fast-switching capability of GaN technology, monolithically integrated GaN power IC is beneficial. For instance integration helps to reduce the gate ringing, switching loss which in-turn makes a smooth highly efficient circuit.

Urmimala Chatterjee received her bachelor’s degree from WBUT, India and master’s degree from NTU-TUM, Munich. After that she pursued her PhD in ESAT, KU Leuven on power converter design for PV application.
Before joining IMEC, she worked a few years in TAS, Belgium on discrete circuit design for space electronics. Presently in IMEC she is working in GaN power electronics, mainly responsible for GaN IC activities and device design.

9:30

– Addressing Generic Challenges in the Semiconductor Ecosystem through International Cooperation

In spite of large public and private investments the European semiconductor ecosystem is facing considerable challenges. These are multi-facetted and range from limitations in manufacturing capacity, in the available workforce and in the supply chains to risks associated with disruptive events and to worries about the environmental impact of the semiconductor industry. International cooperation between the EU and other regions will be of great benefit in this context, either to tackle common challenges together or to mitigate each other’s challenges in a balanced way. The ICOS-project has conducted a generic study about those challenges and about options for cooperation. This study will be published in a form of a whitepaper soon. It is now followed by an analysis of concrete options of cooperation with specific regions and on specific topics.

Roel Baets is an emeritus full professor at Ghent University and imec. For many years he has made contributions to research on integrated photonics (silicon, silicon nitride, III-V) and its applications in datacom/telecom as well as in medical and environmental sensing. He has founded and has chaired ePIXfab, the European Silicon Photonics Alliance, and continues to serve the silicon photonics community at large in advisory roles. He is a Fellow of IEEE, EOS and Optica. He has been recipient of amongst others the 2020 John Tyndall Award and the 2023 IEEE Photonics Award.

11:30

SESSION 2 – HETEROGENEOUS INTEGRATION AND PACKAGING

9:30

– Beyond Von Neumann computing architectures and Heterogeneous integration

With the recent COVID-19 crisis, the importance of Semiconductor technologies has been evidenced, increasing significantly the interest of all the countries due to its impact on sovereignty. Each country launched its own initiative to strengthen its position in Semiconductor. Many organizations all around the world are proposing new solutions for advanced computing. Many options, including disruptive approaches, are investigated in order to provide new solutions for competitive technologies. This talk will detail the main actors and the main solutions that are developed for the next generations of Advanced Computing technologies. Details of the main leading actors (research organizations, universities, industries) will be provided, as well as details on the main technological approaches that are developed. Strengths and weaknesses will also be detailed.

Olivier Faynot received his Ph.D. degree from the Institut National Polytechnique de Grenoble in 1995. He joined CEA-LETI in 1995. Since 2019, he is managing the whole Silicon Component division at CEA-LETI. He is author and co-author of more than 300 scientific publications in journals and international conferences, and was successively in the committees of the main international Semiconductors conferences like IEDM, the symposium on VLSI Technology, the IEEE International SOI conference, the EUROSOI network, SSDM conference and the International S3S conference. He received the ‘Général Férié’ award in 2012 and the ‘Electron d’Or’ award with CEA-Leti, ST Microelectronics and SOITEC in 2017.

9:30

– Heterogenous integration -Enabling systems beyond Moore’s Law

Heterogenous integration brings together the world of semiconductors with advanced packaging technologies (e. g. for pcb) and enables by these systems that overcome Moore’s Law. The presentation shows realized examples based on available technologies in industry as well as from Fraunhofer IZM and other FMD-institutes.
According to the demands from different application fields like automotive, medical, food or automation in combination with e. g. AI or HPC possible challenges were discussed. The collaboration with partners from EU and India might be very fruitful, especially taking into account the strong position of India in software and design. Let`s bring together the skills from EU and India.

Dr.-Ing. Andreas Middendorf works as a business developer in the Business Development Team of the Fraunhofer Institute for Reliability and Microintegration (IZM). He was working as a scientist in the department Environmental and Reliability Engineering of the Fraunhofer Institute for Reliability and Microintegration (IZM) and of the Technical University Berlin since May 1995. He was responsible for the development and implementation of methods and demonstrators for the estimation of lifetime for electronic appliances. Further on he is investigating technological aspects that combine the electronics design with environmental engineering techniques. This includes environmental assessments through LCA and through other methods, especially for Eco-Design, the evaluation of recycling attributes, the development of databases and software as well as environmental oriented product evaluation. He carried out courses on EcoDesign for electronic companies, holds four patents and has coordinated several cooperative research projects in Germany and Europe.

14:20

SESSION 3 – SUSTAINABLE MANUFACTURING AND MATERIALS

9:30

– Sustainability in information and communication technologies

In the talk, we will lift the veil on the invisibles of the digital world. Based on the assessed impacts of ICT, we will question the merits of certain technological choices made in the name of the transition. A holistic, transdisciplinary and pragmatic approach must be put in place in order to think, design and innovate within the constraints of our ecosystem limits. Concrete examples of current research will be shared, such as a critical look at the deployment of connected objects, the eco-design of sensors, a reflection on the pursuit of Moore’s law and its environmental consequences, and the strategies to minimize e-waste.

Jean-Pierre Raskin is full professor at the Ecole Polytechnique de Louvain, UCLouvain, Belgium. His research interests are the modeling, wideband characterization and fabrication of advanced SOI MOSFETs and high-frequency integrated circuits, as well as micro and nanofabrication of MEMS / NEMS sensors and actuators, including the extraction of intrinsic material properties at nanometer scale. He is involved in the development of a more sustainable electronics. He has been managing a Chair in eco-innovation at CEA-Leti since January 2024.

He has been IEEE Fellow since 2014. He received the Médaille BLONDEL 2015, the SOI Consortium Award 2016, the European SEMI Award 2017, the Médaille AMPERE 2019, the Georges Vanderlinden Prize 2021 and the IET Achievement Medal in Electronics 2022, in recognition in his vision and pioneering work for RF SOI. He is author or co-author of more than 400 scientific journal articles.

He has been elected member of the Royal Academy of Belgium in 2023.

9:30

– 

Olivier Faynot received his Ph.D. degree from the Institut National Polytechnique de Grenoble in 1995. He joined CEA-LETI in 1995. Since 2019, he is managing the whole Silicon Component division at CEA-LETI. He is author and co-author of more than 300 scientific publications in journals and international conferences, and was successively in the committees of the main international Semiconductors conferences like IEDM, the symposium on VLSI Technology, the IEEE International SOI conference, the EUROSOI network, SSDM conference and the International S3S conference. He received the ‘Général Férié’ award in 2012 and the ‘Electron d’Or’ award with CEA-Leti, ST Microelectronics and SOITEC in 2017.

9:30

– Bio-based materials and processes for pcbs: an example of pathway for sustainable micro-nanoelectronics?

After a brief introduction to the global context and related challenges, some promising and original technological avenues in the field of printed circuits will be described, from the point of view of materials, manufacturing and recycling processes.
The obtained results could pave the way towards greater sustainability in the micro and nanoelectronics sector.

Pascal XAVIER, received the Ph. D. degree in Physics from the University of Grenoble, France, in 1994. He was also graduated from Grenoble INP in electrical engineering in 1988. From 1994 to 2003, in the CNRS, his research interests were dealing with numerical methods for the analysis of coupled thermo-electromagnetics problems and design of microsensors in the fields of microwaves.

He joined the Centre for Radiofrequencies, Optics and Microelectronics of the Alps (CROMA) of Grenoble in 2003 where he is currently team leader and coordinator of a Horizon Europe EIC Pathfinder Challenges project on responsible electronics. His research interests include design, realization and test of sustainable microwave devices and sensors for environmental applications, bioelectromagnetism and characterization of complex materials.

He is Full Professor in the Department of Electrical Engineering, Technology University Institute of Grenoble (UGA), involved in teaching of Electronics and Physics.

16:40

SESSION 4 – IC AND SYSTEM DESIGN

9:30

– The Quest for Open-Source tinyML Heterogeneous Hardware Acceleration: A 10+ Year PULP Journey

In the last few years, our perception of what constitutes a “tinyML device” has shifted from simple microcontrollers to complex heterogeneous SoCs suited to execute DNNs directly at the extreme edge in real time and at minimal power cost. These devices provide ultra-low latency and high energy efficiency necessary to meet the constraints of advanced use cases that can not be satisfied by cloud solutions. However, how can tinyML hardware keep up with the evolution of the AI landscape, continuously pushing towards much larger and more complex models? The costs to develop new accelerators and Neural Processing Units for each evolutive step in AI are hard to sustain. A possible way forward is given by the open-source model for digital hardware, popularized by RISC-V: multiple actors – both academic and industrial – collaborate on the development of digital technology that can benefit all parties. In this presentation, I discuss a 10+-year “quest” to push the performance and energy efficiency of tinyML further and further by exploiting a fully open-source model based on the PULP Platform initiative. I show how the open-source cooperative model makes it possible to combine different ideas and contributions in a technologically portable way, acting as an innovation catalyst and enabling the fast pace of evolution required to keep up with new ideas in AI within a tiny power budget.

Francesco Conti received his Ph.D. degree in electronic engineering from the University of Bologna, Italy, in 2016. He is currently a Tenure-Track Assistant Professor with the DEI Department at the University of Bologna. He has also served as a consultant on hardware acceleration for AI for GreenWaves Technologies, Grenoble from 2020 to 2024. From 2016 to 2020, he held a research grant with the University of Bologna and a position as a Post-Doctoral Researcher with ETH Zürich. His research is centered on hardware acceleration in ultra-low power and highly energy-efficient platforms, with a particular focus on System-on-Chips for Artificial Intelligence applications. His research work has resulted in more than 100 publications in international conferences and journals and was awarded several times, including the 2020 IEEE Transactions on Circuits and Systems I: Regular Papers Darlington Best Paper Award.

Elles van de Ven is Policy Officer within the Unit “Microelectronics and Photonics” at the European Commission, Directorate General for Communications Networks, Content & Technology. She received a LL.M. from the Amsterdam Law School of the University of Amsterdam, specialising in European Competition Law and Regulation. After her studies, Elles worked for the Ministry of Economic Affairs and Climate Policy of the Netherlands, playing a key role in Dutch semiconductor policy initiatives. In the European Commission, she works on implementation of the European Chips Act, economic security and international cooperation.

Francis Balestra, CNRS Research Director at CROMA, is Director Emeritus of the European SINANO Institute and President of IEEE Electron Device Society France, and has been Director of several Research labs. He coordinated several European Projects (NEREID, NANOFUNCTION, NANOSIL, etc.) that have represented unprecedented collaborations in Europe in the field of Nanoelectronics, and is currently coordinator of the Horizon Europe ICOS project dedicated to International Cooperation on Semiconductors with leading semiconductor countries. He founded and organized many international Conferences, and has co-authored more than 500 publications. He is member of several European Scientific Councils, of the Advisory Committees of International Journals and of the IRDS (International Roadmap for Devices and Systems) International Roadmap Committee, as representative of Europe.