[Interview] Standardisation: a critical step for digital and green transitions

In the frame of ICOS, Ryoichi Ishihara and Salahuddin Nur, respectively Associate Professor and Assistant Professor at TU Delft and ICOS members, coordinated a report on Landscape and
gap analysis of standards in semiconductor and chip technologies. In collaboration with ALLPROS.EU and StandICT, they analysed the current situation of standardisation in the field, and provide insight on future challenges and opportunities for semiconductors.

Regarding the current geopolitical context, why is standardisation of critical importance for the semiconductor area?

Currently there is an extreme global dependency of the semiconductor value chain on a very limited number of actors. Because of the complex geopolitical context, EU Chips Act [1] has been established. The goal is to make EU semiconductor ecosystem more resilient, competitive and sovereign, which will prevent the risk of factory closure and economic disruption in a range of sectors from cars to healthcare due to shortage of chips. The standardisation activities in semiconductors are critical to ensure to achieve the key goals of EU by improving interoperability, efficiency, and technological leadership. The activities also support both the digital and green transitions that EU bolsters.

Your report provides a landscape overview of existing standards in semiconductors. What is the current situation regarding standardisation?

We have performed a landscape analysis based on applications, process steps, technologies and relevance to the semiconductor and chips. Applications related to Generic/Transversal and Security categories are well covered, however coverage is limited for Automotive, Aerospace & Defense, Consumer, Healthcare, and Industry sectors, and almost non-existent for Data Center, or Edge & cloud applications. This also reflects the current use of the chips in a car, a plane, or a laptop. However, we must be aware that this may change as the industry is shifting into more dedicated applications. In terms of process steps, front-end and back-end fabrication are well covered, while coverage for front-end and back-end equipment is somewhat limited. Very few classifications were identified so far for IC design tools and the overall IC design process, where we need attention. In terms of technologies, we have identified there are gaps in standards in emerging technologies, which we separately analyzed in detail and provided recommendations (see below).

 

What are the main difficulties/obstacles when it comes to standardisation specifically for the semiconductors?

First, we were surprised by the large number of SDOs and their committees involved in semiconductor and chip standardisation activities of about 75. Also, there are so many varieties of scope and abstract templates used by those SDOs. This made difficult for us to analyse the standards. Nevertheless, we have successfully analysed about 5,000 global standards of semiconductors and chips.

 

Could you briefly explain the respective contributions, knowledge, and competencies of the entities involved in developing this report?

At beginning, we identified that ICOS alone cannot develop this report. Therefore, we have created a Technical Working Group on Semiconductor and Chip Standardisation consisting of ICOS, StandICT.eu [2] and ALLPROS.eu [3]. While StandICT.eu helped on global reach in the European ICT Standardisation Ecosystem and ALLPROS.eu brought multiple tools that aim to promote the European industry. Together we have analysed the standard of semiconductors and chips.

 

You also address gap analysis. What opportunities did you identify for developing news standards? And how can it align with Europe ambition to have more technological sovereignty?

According to our analysis, gaps exist mainly in emerging technology. Some of those gaps are related to the sub 5nm technology, others are related to Neuromorphic/ReRAM/AI Chips, Quantum Technologies, and energy efficiency and sustainability. About their impact on the European Union’s semiconductor strategy, we note that the sub 5nm technology was mentioned in the EU Chips Act but those standards are very limited. Similarly, when it comes to Neuromorphic/ReRAM/AI Chips or Quantum Technologies, the standards are limited even though the EU Chips act stated that “Europe needs to establish and invest in an infrastructure to develop knowledge and expertise in building technologies such as processors as well as new emerging technologies such as AI, neuromorphic, quantum etc”. Also, standards for energy efficiency and sustainability for manufacturing and usage of the chips are very limited, despite the EU’s strategy. There are opportunities to develop standards in these fields, which have high impact on the society and the economy, to technically lead those fields and ensure technological sovereignty.

 

Is there a need to develop collaboration and joint working groups between the Standard Developing Organizations to reach a wider international consensus?

The collaboration between SDOs and joint working group to standardize new technology will be a good way to reduce financial, technological, and operational risks to the industry, the investors, and the taxpayers in times where uncertainties are high and resources are limited. As an example, we recommend SDOs to create open rules to harmonize the contents through identification of predefined fields. Such collaboration however requires long term vision and strategic thinking that should be coordinated at a higher level for example at the European Commission through different mechanisms to make sure all the stakeholders are involved and more importantly rewarded fairly and proportionally to their contribution.